3.3.10. DMC t_rc Register at 0x0024

The read/write dmc_ t_rc Register sets the Active bank x to Active bank x delay in memory clock cycles. It can only be read and written in the Config or Low-power state. Figure 3.15 shows the register bit assignments.

Figure 3.15. dmc_t_rc Register bit assignments

Table 3.11 lists the register bit assignments.

Table 3.11. dmc_t_rc Register bit assignments

Bits

Name

Function

[31:4]

-

Read undefined, write as zero

[3:0]

t_rcSet Active bank x to Active bank x delay in memory clock cycles
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