3.5.5. SMC Direct Command Register at 0x1010

The write-only smc_direct_cmd Register passes commands to the external memory, and controls the updating of the chip configuration registers with values held in the set_opmode and set_cycles registers.

This register cannot be written to in either the Reset or Low-power states. Figure 3.39 shows the register bit assignments.

Figure 3.39. smc_direct_cmd Register bit assignments

Table 3.40 lists the register bit assignments.

Table 3.40. smc_directcmd Register bit assignments

[31:26]-Reserved, write as zero.

Selects chip configuration register bank to update and enables chip mode register access depending on cmd_type. The encoding is:

b000-b001 = chip selects 0-1 on interface 0

b010-b111 = Reserved.


Determines the current command. The encoding is:

b00 = Reserved

b01 = ModeReg access

b10 = UpdateRegs

b11 = Reserved.

[20:0]-Reserved, write as zero.
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