3.2. DMC Register summary

Figure 3.2 shows the DMC configuration register map.

Figure 3.2. DMC configuration register map

Figure 3.3 shows the DMC ID configuration registers map.

Figure 3.3. DMC id configuration register map

Figure 3.4 shows the DMC chip configuration register map.

Figure 3.4. DMC chip configuration register map

Figure 3.5 shows the DMC peripheral and PrimeCell identification configuration register map.

Figure 3.5. DMC peripheral and PrimeCell Identification configuration register map

Table 3.1 lists the DMC registers.

Table 3.1. DMC register summary

Name

Base offset

Type

Reset value

Description

dmc_memc_status

0x000

RO

0x00000790

See DMC Memory Controller Status Register at 0x0000.

dmc_memc_cmd

0x004

WO-See DMC Memory Controller Command Register at 0x0004.
dmc_direct_cmd0x008WO-See DMC Direct Command Register at 0x0008.
dmc_memory_cfg0x00CR/W0x00010020See DMC Memory Configuration Register at 0x000C.
dmc_refresh_prd0x010R/W0x00000A60See DMC Refresh Period Register at 0x0010.
dmc_cas_latency0x014R/W0x00000006See DMC CAS Latency Register at 0x0014.
dmc_t_dqss0x018R/W0x00000001See DMC t_dqss Register at 0x0018.
dmc_t_mrd0x01CR/W0x00000002See DMC t_mrd Register at 0x001C.
dmc_t_ras0x020R/W0x00000007See DMC t_ras Register at 0x0020.
dmc_t_rc0x024R/W0x0000000BSee DMC t_rc Register at 0x0024.
dmc_t_rcd0x028R/W0x0000001DSee DMC t_rcd Register at 0x0028.
dmc_t_rfc0x02CR/W0x00000212See DMC t_rfc Register at 0x002C.
dmc_t_rp0x030R/W0x0000001DSee DMC t_rp Register at 0x0030.
dmc_t_rrd0x034R/W0x00000002See DMC t_rrd Register at 0x0034.
dmc_t_wr0x038R/W0x00000003See DMC t_wr Register at 0x0038.
dmc_t_wtr0x03CR/W0x00000002See DMC t_wtr Register at 0x003C.
dmc_t_xp0x040R/W0x00000001See DMC t_xp Register at 0x0040.
dmc_t_xsr0x044R/W0x0000000ASee DMC t_xsr Register at 0x0044.
dmc_t_esr0x048R/W0x00000014See DMC t_esr Register at 0x0048.
dmc_id_<0-5>_cfg0x100R/W0x00000000

See DMC id_<0-5>_cfg Registers at 0x0100.

dmc_chip_<0-3>_cfg0x200R/W0x0000FF00

See DMC chip_<0-3>_cfg Registers at 0x0200.

dmc_user_status0x300RO-See DMC user_status Register at 0x0300.
dmc_user_config0x304WO-See DMC user_config Register at 0x0304.
dmc_int_cfg0x0E00R/W0x0See DMC Integration Configuration Register at 0x0E00.
dmc_int_inputs0x0E04ROTie-off dependentSee DMC Integration Inputs Register at 0x0E04.
dmc_int_outputs0x0E08WO-See DMC Integration Outputs Register at 0x0E08.
dmc_periph_id_<0-3>0xFE0-0xFECRO-

See DMC Peripheral Identification Registers <0-3> at 0x0FE0-0x0FEC.

dmc_pcell_id_<0-3>0xFF0-0xFFCRO-

See DMC PrimeCell Identification Registers <0-3> at 0xFF0-0xFFC.

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