A.4. DMC memory interface signals

Table A.3 lists the DMC memory interface signals.

Table A.3. DMC memory interface signals

NameType

Source/

destination

Description
dmc_fbclk_inInputMemoryFed back clock
dmc_dqs_in_<0-1>InputMemoryData strobe in
dmc_dqs_in_n_<0-1>InputMemoryInverted data strobe in
dmc_dq_in[15:0]InputMemoryData in
dmc_clk_out[3:0]OutputMemoryClock out
dmc_ras_nOutputMemoryRow address strobe
dmc_cas_nOutputMemoryColumn address strobe
dmc_we_nOutputMemoryWrite enable
dmc_ckeOutputMemoryClock enable
dmc_cs_n[3:0]OutputMemoryChip select
dmc_add[15:0]OutputMemoryAddress
dmc_ba[1:0]OutputMemoryBank address
dmc_apOutputMemoryAuto precharge
dmc_dqs_out_<0-1>OutputMemoryData strobe out
dmc_dq_out[15:0]OutputMemoryData out
dmc_data_enOutputMemoryData enable
dmc_dqm[1:0]OutputMemoryData mask
dmc_use_ebiInputMemoryUse EBI tie-off
dmc_ebibackoffInputMemoryEBI back off
dmc_ebigrantInputMemoryEBI grant
dmc_ebireqOutputMemoryEBI request
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