A.5. DMC miscellaneous signals
Table A.4 lists
the DMC miscellaneous signals.
Table A.4. DMC miscellaneous signals
| Name | Type | Source/ destination | Description |
|---|
| dmc_qos_override[15:0] | Input | System | QoS override |
| dmc_user_status[7:0] | Input | System | User signals to the configuration port |
| dmc_memory_width[1:0] | Input | System | Memory width tie-off |
| dmc_async | Input | System | AHB clock synchronous to memory clock |
| dmc_msync | Input | System | Memory clock synchronous to AHB clock |
| dmc_a_gt_m_sync | Input | System | AHB clock synchronous to and greater than memory
clock |
| dmc_cke_init | Input | System | CKE polarity tie-off |
| dmc_dqm_init | Input | System | DQM polarity tie-off |
| dmc_user_config[7:0] | Output | System | User signals from the configuration port |
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