CoreSight™ PTM™-A9 Technical Reference Manual 2.3.2. Configuration Code Register, ETMCCR

The Configuration Code Register, ETMCCR, provides information about the configuration of the PTM-A9. It is:

Figure 2.3 shows the bit assignments for the Configuration Code Register.

Figure 2.3. Configuration Code Register bit assignments

Table 2.4 shows the bit assignments for the Configuration Code Register. The Configuration Code Register has the value 0x8D294004.

Table 2.4. Configuration Code Register bit assignments

Bits	Field	Function
[31]	ID Register present	Indicates that the ID Register is present. See ID Register, ETMIDR.
[30:28]	-	Reserved, RAZ on reads.
[27]	Software access	Indicates that software access is supported, see Programming the PTM-A9.
[26]	Trace stop/start block	Indicates that the trace start/stop block is present.
[25:24]	Number of Context ID comparators	Specifies the number of Context ID comparators, one.
[23]	FIFOFULL logic	Indicates that it is not possible to stall the processor to prevent FIFO overflow.
[22:20]	Number of external outputs	Specifies the number of external outputs, two.
[19:17]	Number of external inputs	Specifies the number of external inputs, four.
[16]	Sequencer	Indicates that the sequencer is present.
[15:13]	Number of counters	Specifies the number of counters, two.
[12:4]	-	Reserved
[3:0]	Number of pairs of address comparators	Specifies the number of address comparator pairs, four.

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