PrimeCell Level 2 MBIST Controller (PL310) Technical Reference Manual Conventions

Conventions

Conventions that this manual can use are described in:

Typographical

The typographical conventions are:

italic

Highlights important notes, introduces special terminology, denotes internal cross-references, and citations.

bold

Highlights interface elements, such as menu names. Denotes ARM processor signal names. Also used for terms in descriptive lists, where appropriate.

monospace

Denotes text that you can enter at the keyboard, such as commands, file and program names, and source code.

monospace

Denotes a permitted abbreviation for a command or option. You can enter the underlined text instead of the full command or option name.

monospace italic

Denotes arguments to monospace text where the argument is to be replaced by a specific value.

monospace bold

Denotes language keywords when used outside example code.

< and >

Angle brackets enclose replaceable terms for assembler syntax where they appear in code or code fragments. They appear in normal font in running text. For example:

MRC p15, 0 <Rd>, <CRn>, <CRm>, <Opcode_2>
The Opcode_2 value selects which register is accessed.

Timing diagrams

The figure named Figure 1 explains the components used in timing diagrams. Variations, when they occur, have clear labels. You must not assume any timing information that is not explicit in the diagrams.

Shaded bus and signal areas are undefined, so the bus or signal can assume any value within the shaded area at that time. The actual level is unimportant and does not affect normal operation.

Figure 1. Key to timing diagram conventions

Signals

The signal conventions are:

Signal level

The level of an asserted signal depends on whether the signal is active-HIGH or active-LOW. Asserted means:

HIGH for active-HIGH signals
LOW for active-LOW signals.

Lower-case n

At the start or end of a signal name denotes an active-LOW signal.

Prefix A

Denotes global Advanced eXtensible Interface (AXI) signals.

Prefix AR

Denotes AXI read address channel signals.

Prefix AW

Denotes AXI write address channel signals.

Prefix B

Denotes AXI write response channel signals.

Prefix C

Denotes AXI low-power interface signals.

Prefix H

Denotes Advanced High-performance Bus (AHB) signals.

Prefix P

Denotes Advanced Peripheral Bus (APB) signals.

Prefix R

Denotes AXI read data channel signals.

Prefix W

Denotes AXI write data channel signals.

Numbering

The numbering convention is:

<size in bits>'<base><number>

This is a Verilog method of abbreviating constant numbers. For example:

'h7B4 is an unsized hexadecimal value.
'o7654 is an unsized octal value.
8'd9 is an eight-bit wide decimal value of 9.
8'h3F is an eight-bit wide hexadecimal value of 0x3F. This is equivalent to b00111111.
8'b1111 is an eight-bit wide binary value of b00001111.

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