3.2.3. Read latency and write latency fields, MBIR[44:41] and MBIR[48:45]

The read latency and write latency fields of the MBIR are used to specify the read and write latency of the RAM under test. Read and write latencies are the numbers of cycles that the RAM requires to complete read and write operations. For example, in a write to a RAM with a write latency of two cycles, the RAM inputs are valid for a single cycle. The next cycle is a NOP cycle with the chip enable negated. Similarly, in a read from a RAM with a read latency of three cycles, the RAM inputs are valid for a single cycle. After two NOP cycles, the read data is valid on the RAM outputs.

Note

Even if the RAM under test uses the same latency for both read and write operations, you must still program both the read latency and write latency fields of the MBIR with the same value.

Table 3.4 shows the latency settings for read operations.

Table 3.4. Read latency field encoding

Read latency

MBIR[44:41]

Number of cycles

per read operation

b00001
b00012
b00103
b00114
b01005
b01016
b01107
b01118
b10009
b100110
b101011
b101112
b110013
b110114
b111015
b111116

Table 3.5 shows the latency settings for write operations.

Table 3.5. Write latency field encoding

Write latency

MBIR[48:45]

Number of cycles

per write operation

b00001
b00012
b00103
b00114
b01005
b01016
b01107
b01118
b10009
b100110
b101011
b101112
b110013
b110114
b111015
b111116

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