AMBA Level 2 MBIST Controller (L2C-310) Technical Reference ManualRevision: r3p1
Home > MBIST Instruction Register > Field descriptions > Cache size field, MBIR[8:6]

3.2.8. Cache size field, MBIR[8:6]

The cache size field specifies the size of the cache in your implementation of the module. Table 3.13 shows the supported cache sizes.

Table 3.13. Cache size field encoding

Cache size

MBIR[8:6]

Cache size
b000Reserved
b001128KB
b010256KB
b011512KB
b1001MB
b1012MB
b1104MB
b1118MB

Copyright © 2007-2010 ARM. All rights reserved.ARM DDI 0402E
Non-Confidential
PDF file icon  PDF version
Home > MBIST Instruction Register > Field descriptions > Cache size field, MBIR[8:6]