2.2. SCU registers

Table 2.1 shows the SCU registers. Addresses are relative to the base address of the region for the SCU memory map, which is PERIPHBASE[31:13]. All SCU registers are byte accessible and are reset by nSCURESET.

Table 2.1. SCU registers summary

Offset from PERIPHBASE[31:13]

NameReset valueBankedPage
0x00SCU Control Register

Implementation defined

NoSCU Control Register
0x04SCU Configuration Register

Implementation defined

NoSCU Configuration Register
0x08SCU CPU Power Status Register-NoSCU CPU Power Status Register
0x0CSCU Invalidate All Registers in Secure State0x0NoSCU Invalidate All Registers in Secure State Register
0x40Filtering Start Address Register

Defined by FILTERSTART input

NoFiltering Start Address Register
0x44Filtering End Address Register

Defined by FILTEREND input

NoFiltering End Address Register
0x50SCU Access Control (SAC) Registerb1111NoSCU Access Control Register (SAC) Register
0x54SCU Non-secure Access Control (SNSAC) Register 0x0NoSCU Non-secure Access Control Register

Note

SCU registers must not be written with NEON STR instructions.

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