2.4.2. ACP interface clocking

Unlike the AXI Master port interfaces, the ACP port does not support half clock ratio between the AXI clock and the SCU clock.Only integer clock ratios are supported, with the use of a single ACLKENS signal.

Figure 2.13 shows a timing example where ACKLENS is used with a 3:1 clock ratio between CLK and the ACP AXI clock, ACLK.

Figure 2.13. ACLKENS timing example

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The ACP slave port samples the AXI input requests, and the AXI output values, only on the rising edge of CLK when ACLKENS is HIGH.

Copyright © 2008-2011 ARM. All rights reserved.ARM DDI 0407G