3.4.1. CPU Interface Implementer Identification Register

The ICCIIDR Register characteristics are:

Purpose

Provides information about the implementer and the revision of the controller.

Usage constraints

There are no usage constraints.

Configurations

Available in all Cortex-A9 MPCore configurations.

Attributes

See the register summary in Table 3.8.

Figure 3.8 shows the ICCIIDR bit assignments.

Figure 3.8. ICCIIDR bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 3.9 shows the ICCIIDR bit assignments.ss

Table 3.9. ICCIIDR bit assignments

BitsValuesNameFunction
[31:20]0x390Part number

Identifies the peripheral.

[19:16]0x1Architecture version

Identifies the architecture version.

[15:12]0x2Revision number

Returns the revision number of the Interrupt Controller. The implementer defines the format of this field.

[11:0]0x43BImplementer

Returns the JEP106 code of the company that implemented the Cortex-A9 processor interface RTL. It uses the following construct:

[11:8]

the JEP106 continuation code of the implementer

[7]

0

[6:0]

the JEP106 code [6:0] of the implementer.


Copyright © 2008-2011 ARM. All rights reserved.ARM DDI 0407G
Non-ConfidentialID072711