2.3.2. Cortex-A9 MPCore AXI transactions

Cortex-A9 MPCore contains up to four individual Cortex-A9 processors that can generate only a subset of all AXI transactions as described in the Cortex-A9 Technical Reference Manual. As a consequence, only this subset of AXI transactions can appear on the Cortex-A9 MPCore master ports.

However, when the ACP is implemented, ACP traffic can generate transactions not defined in this list.

Copyright © 2008-2011 ARM. All rights reserved.ARM DDI 0407G
Non-ConfidentialID072711