3.3. Distributor register descriptions

This section describes the registers that the distributor provides. Table 3.1 shows the distributor registers.

Registers not described in Table 3.1 are RAZ/WI. This section does not reproduce information about registers already described in the ARM Generic Interrupt Controller Architecture Specification 1.0.

The ICDIPR and ICDIPTR registers are byte accessible and word accessible. All other registers in Table 3.1 are word accessible.

See Table 1.3 for the offset of this page from PERIPHBASE[31:13].

Table 3.1. Distributor register summary

BaseNameTypeResetWidthFunction
0x000

ICDDCR

RW0x0000000032

Distributor Control Register

0x004ICDICTR

RO

Configuration dependent32

Interrupt Controller Type Register

0x008ICDIIDRRO0x0102043B32

Distributor Implementer Identification Register

0x00C - 0x07C----

Reserved

0x080 - 0x09CICDISRn

RW[a]

0x00000000

32

Interrupt Security Registers

0x100ICDISERnRW

0x0000FFFF

32

Interrupt Set-Enable Registers

0x104 - 0x11C

0x00000000

 
0x180 ICDICERnRW

0x0000FFFF

32

Interrupt Clear-Enable Registers

0x184 - 0x19C

0x00000000

0x200 - 0x27CICDISPRnRW

0x00000000

32

Interrupt Set-Pending Registers

0x280 - 0x29CICDICPRnRW

0x00000000

32

Interrupt Clear-Pending Registers

0x300 - 0x31CICDABRnRO0x0000000032

Active Bit registers

0x380 - 0x3FC----

Reserved

0x400 - 0x4FCICDIPTRnRW0x0000000032

Interrupt Priority Registers

0x7FC

----

Reserved

0x800 - 0x8FCICDIPTRn

RW

0x0000000

32

Interrupt Processor Targets Registers

0xBFC

----

Reserved

0xC00ICDICFRnRW

0xAAAAAAAA

32

Interrupt Configuration Registers

0xC04

0x7DC00000

0xC08 - 0xC3C

0x55555555[b]

0xD00ICPPISR-

0x00000000

32

PPI Status Register

0xD04 - 0xD1CICSPISRnRO

0x00000000

32

SPI Status Registers

0xD80 - 0xEFC----Reserved

0xF00

ICDSGIRWO-32

Software Generated Interrupt Register

0xF04 - 0xFCC----Reserved
0xFD0

ICPIDR0

RO0x48

Peripheral ID0 register

0xFD4

ICPIDR1

RO0x08

Peripheral ID1 register

0xFD8

ICPIDR2

RO0x08

Peripheral ID2 register

0xFDC

ICPIDR3

RO0x08

Peripheral ID3 register

0xFE0

ICPIDR4

RO0x908

Peripheral ID4 register

0xFE4

ICPIDR5

RO0xB38

Peripheral ID5 register

0xFE8

ICPIDR6

RO0x1B8

Peripheral ID6 register

0xFEC

ICPIDR7

RO0x08

Peripheral ID7 register

0xFF0

ICCIDR0

RO0xD8

Component ID0 register

0xFF4

ICCIDR1

RO0xF08

Component ID1 register

0xFF8

ICCIDR2

RO0x58

Component ID2 register

0xFFC

ICCIDR3

RO0xB18

Component ID3 register

[a] You must access this register in Secure state.

[b] Reset value is 0x55555555 when the corresponding interrupts are present, else 0x00000000


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