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Home > Interrupt Controller > Distributor register descriptions |
This section describes the registers that the distributor provides. Table 3.1 shows the distributor registers.
Registers not described in Table 3.1 are RAZ/WI. This section does not reproduce information about registers already described in the ARM Generic Interrupt Controller Architecture Specification 1.0.
The ICDIPR and ICDIPTR registers are byte accessible and word accessible. All other registers in Table 3.1 are word accessible.
See Table 1.3 for the offset of this page from PERIPHBASE[31:13].
Table 3.1. Distributor register summary
Base | Name | Type | Reset | Width | Function |
---|---|---|---|---|---|
0x000 | ICDDCR | RW | 0x00000000 | 32 | |
0x004 | ICDICTR | RO | Configuration dependent | 32 | |
0x008 | ICDIIDR | RO | 0x0102043B | 32 | |
0x00C - 0x07C | - | - | - | - | Reserved |
0x080 - 0x09C | ICDISRn | RW[a] |
| 32 | Interrupt Security Registers |
0x100 | ICDISERn | RW |
| 32 | Interrupt Set-Enable Registers |
0x104 - 0x11C |
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0x180 | ICDICERn | RW |
| 32 | Interrupt Clear-Enable Registers |
0x184 - 0x19C |
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0x200 - 0x27C | ICDISPRn | RW |
| 32 | Interrupt Set-Pending Registers |
0x280 - 0x29C | ICDICPRn | RW |
| 32 | Interrupt Clear-Pending Registers |
0x300 - 0x31C | ICDABRn | RO | 0x00000000 | 32 | Active Bit registers |
0x380 - 0x3FC | - | - | - | - | Reserved |
0x400 - 0x4FC | ICDIPTRn | RW | 0x00000000 | 32 | Interrupt Priority Registers |
| - | - | - | - | Reserved |
0x800 - 0x8FC | ICDIPTRn | RW |
| 32 | |
| - | - | - | - | Reserved |
0xC00 | ICDICFRn | RW |
| 32 | |
0xC04 |
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0xC08 - 0xC3C |
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0xD00 | ICPPISR | - |
| 32 | |
0xD04 - 0xD1C | ICSPISRn | RO |
| 32 | |
0xD80 - 0xEFC | - | - | - | - | Reserved |
| ICDSGIR | WO | - | 32 | Software Generated Interrupt Register |
0xF04 - 0xFCC | - | - | - | - | Reserved |
0xFD0 | ICPIDR0 | RO | 0x4 | 8 | Peripheral ID0 register |
0xFD4 | ICPIDR1 | RO | 0x0 | 8 | Peripheral ID1 register |
0xFD8 | ICPIDR2 | RO | 0x0 | 8 | Peripheral ID2 register |
0xFDC | ICPIDR3 | RO | 0x0 | 8 | Peripheral ID3 register |
0xFE0 | ICPIDR4 | RO | 0x90 | 8 | Peripheral ID4 register |
0xFE4 | ICPIDR5 | RO | 0xB3 | 8 | Peripheral ID5 register |
0xFE8 | ICPIDR6 | RO | 0x1B | 8 | Peripheral ID6 register |
0xFEC | ICPIDR7 | RO | 0x0 | 8 | Peripheral ID7 register |
0xFF0 | ICCIDR0 | RO | 0xD | 8 | Component ID0 register |
0xFF4 | ICCIDR1 | RO | 0xF0 | 8 | Component ID1 register |
0xFF8 | ICCIDR2 | RO | 0x5 | 8 | Component ID2 register |
0xFFC | ICCIDR3 | RO | 0xB1 | 8 | Component ID3 register |
[a] You must access this register in Secure state. [b] Reset value is |