3.3.1. Distributor Control Register

The ICDDCR characteristics are:

Purpose

Controls whether the distributor responds to external stimulus changes that occur on SPIs and PPIs.

Usage constraints

This register is banked. The register you access depends on the type of access:

Secure access

Distributor provides access to the Secure Enable and Non-Secure Enable bits. See Figure 3.1.

Non-secure access

Distributor provides access to the Non-Secure enable bit only. See Figure 3.2.

You cannot modify Enable Secure if CFGSDISABLE is set. You can modify Enable Non-Secure even if CFGSDISABLE is set, through the S or the NS register.

Configurations

Available in all Cortex-A9 MPCore configurations.

Attributes

See the register summary in Table 3.1.

Figure 3.1 shows the ICDDCR bit assignments for Secure accesses.

Figure 3.1. ICDDCR bit assignments for Secure accesses

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Table 3.2 shows the ICDDCR bit assignments for secure accesses.

Table 3.2. ICDDCR bit assignments for secure accesses

BitsNameFunction
[31:2]-Reserved
[1]Enable Non-secure

0 = disables all Non-secure interrupts control bits in the distributor from changing state because of any external stimulus change that occurs on the corresponding SPI or PPI signals

1 = enables the distributor to update register locations for Non-secure interrupts

[0]Enable secure

0 = disables all Secure interrupt control bits in the distributor from changing state because of any external stimulus change that occurs on the corresponding SPI or PPI signals.

1 = enables the distributor to update register locations for Secure interrupts.


Figure 3.2 shows the ICDDCR bit assignments for Non-secure accesses.

Figure 3.2. ICDDCR bit assignments for Non-secure accesses

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Table 3.3 shows the ICDDCR bit assignments for Non-secure accesses.

Table 3.3. ICDDCR bit assignments for Non-secure accesses

BitsNameFunction
[31:1]-Reserved
[0]Enable Non-secure

0 = disables all Non-secure interrupts control bits in the distributor from changing state because of any external stimulus change that occurs on the corresponding SPI or PPI signals

1 = enables the distributor to update register locations for Non-secure interrupts


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