| Copyright © 2008-2011 ARM. All rights reserved. | ARM DDI 0407G |
| Non-Confidential | ID072711 |
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The SCU connects one to four Cortex-A9 processors to the memory system through the AXI interfaces.
The SCU functions are to:
maintain data cache coherency between the Cortex-A9 processors
initiate L2 AXI memory accesses
arbitrate between Cortex-A9 processors requesting L2 accesses
manage ACP accesses.
The Cortex-A9 SCU does not support hardware management of coherency of the instruction cache.
| Copyright © 2008-2011 ARM. All rights reserved. | ARM DDI 0407G |
| Non-Confidential | ID072711 |
| PDF version | |
| Home > Snoop Control Unit > About the SCU |