Cortex-A9 MPCore Technical Reference ManualRevision: r3p0
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4.4.4. Comparator Value Registers, 0x10 and 0x14

There are two 32-bit registers, the lower 32-bit comparator value register at offset 0x10 and the upper 32-bit comparator value register at offset 0x14.

You must access these registers with 32-bit accesses. You cannot use STRD/LDRD. There is a Comparator Value Register for each Cortex-A9 processor.

To ensure that updates to this register do not set the Interrupt Status Register proceed as follows:

  1. Clear the Comp Enable bit in the Timer Control Register.

  2. Write the lower 32-bit Comparator Value Register.

  3. Write the upper 32-bit Comparator Value Register.

  4. Set the Comp Enable bit and, if necessary, the IRQ enable bit.

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