1.8.2. Design flow

The Cortex-A9 MPCore processor is delivered as synthesizable RT. Before it can be used in a product, it must go through the following processes:


The implementer configures and synthesizes the RTL to produce a hard macrocell. This might include integrating RAMs into the design.


The integrator connects the implemented design into a SoC. This includes connecting it to a memory system and peripherals.


This is the last process. The system programmer develops the software required to configure and initialize the Cortex-A9 MPCore processor, and tests the required application software.

Each process:

For MCUs, often a single design team integrates the processor before synthesizing the complete design. Alternatively, the team can synthesise the processor on its own or partially integrated, to produce a macrocell that is then integrated, possibly by a separate team.

The operation of the final device depends on:

Build configuration

The implementer chooses the options that affect how the RTL source files are pre-processed. These options usually include or exclude logic that affects one or more of the area, maximum frequency, and features of the resulting macrocell.

Configuration inputs

The integrator configures some features of the Cortex-A9 MPCore processor by tying inputs to specific values. These configurations affect the start-up behavior before any software configuration is made. They can also limit the options available to the software.

Software configuration

The programmer configures the Cortex-A9 MPCore processor by programming particular values into registers. This affects the behavior of the Cortex-A9 MPCore processor.


This manual refers to implementation-defined features that are applicable to build configuration options. Reference to a feature that is included means that the appropriate build and pin configuration options are selected. Reference to an enabled feature means one that has also been configured by software.

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