Cortex-A9 MPCore Technical Reference Manual: Appendix A. Signal Descriptions

Appendix A. Signal Descriptions

This appendix describes the Cortex-A9 MPCore signals. In signal names such as TEINIT[N:0], the value of N is one less than the number of processors in your design The appendix contains the following sections:

Clock and clock control signals
Resets and reset control signals
Interrupts
Configuration signals
WFE and WFI Standby signals
Power management signals
AXI interfaces
Performance monitoring signals
Exception flags signals
Parity error signals
MBIST interface
Scan test signal
External Debug interface
PTM interface signals.

Copyright © 2008-2011 ARM. All rights reserved.	ARM DDI 0407G
Non-Confidential	ID072711
PDF version