Appendix A. Revisions

This appendix describes the technical changes between released issues of this book.

Table A.1. Differences between issue A and issue B

ChangeLocation
Removed text stating that implementation of Security Extensions is optionalThroughout book
Created separate entry for the VSWP instructionTable 3.7
Updated values for the VMLA, VMLS, VRECPS, and VRSQRTS instructionsTable 3.8

Table A.2. Differences between issue B and issue C

ChangeLocation
Modified the example code for enabling the Advanced SIMD and VFP extensions in ARM Unified Assembly LanguageExample 2.1
Updated FPSCR bit assignments tableTable 2.10

Table A.3. Differences between issue C and issue D

ChangeLocation
Value for version updated to 2Table 2.7
FPSCR SBZ/WI bits retitled to UNK/SBZPTable 2.10 and Figure 2.4
SBZ/WI bits retitled to UNK/SBZTable 2.11 and Figure 2-5
Added Footnote about special behavior of two VMLA instructionsTable 3.2
Footnote rewordedTable 3.3
Added paragraph about timingsTable 3.9
Table formatting fixes

Table 3.3

Table 3.4

Table 3.5

Table 3.6

Table 3.7

Table 3.8

Table 3.9


Table A.4. Differences between issue D and Issue E

ChangeLocation
No technical change-

Table A.5. Differences between issue E and Issue F

ChangeLocation
ISB added to code exampleExample 2.1
Harmonized FPEXC bit descriptions with the FPU TRM descriptionsTable 2.11

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