3.2.5. MaxXAddr and MaxYAddr fields, MBIR[35:32] and MBIR[31:28]

You can determine the number of address bits you must specify for a RAM from the MBIR fields:

This enables you to specify your address range in two dimensions. The two-dimensional specification represents the topology of the physical implementation of the RAM more accurately. The dimensions are controlled by two separate address counters, the X-address counter and the Y-address counter. One counter can be incremented or decremented only when the other counter has expired. The chosen test algorithm determines the counter that moves faster.

Use this procedure to determine how many bits to assign to the X-address and Y-address counters:

  1. Determine the column width of the RAM array. The Y-address must have at least that many bits for the column select.

  2. Determine how many address bits the RAM requires. See the Cortex-A9 Processor Configuration and Sign-off Guide for more information.

MaxXAddr

The MaxXAddr field specifies the number of X-address counter bits to use during test. Table 3.7 shows the MaxXAddr settings.

Table 3.7. MaxXAddr field encoding

MaxXAddr MBIR[35:32]Number of counter bits
<b0010Unsupported
b00102
b00113
b01004
b01015
b01106
b01117
b10008
b10019
b101010
>b1010Reserved

MaxYAddr

The MaxYAddr field specifies the number of Y-address counter bits to use during test. Table 3.8 shows the MaxYAddr settings.

Table 3.8. MaxYAddr field encoding

MaxYAddr MBIR[31:28]Number of counter bits
<b0010Unsupported
b00102
b00113
b01004
b01015
b01106
b01117
b10008
b10019
b101010
>b1010Reserved

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