Cortex™-A9 MBIST Controller Technical Reference Manual

Revision: r4p0


List of Figures

1. Key to timing diagram conventions
1.1. Cortex-A9 MBIST configuration
1.2. MBIST controller wiring diagram nonparity configuration
1.3. MBIST controller wiring diagram configuration with parity
1.4. Traditional method of interfacing MBIST
1.5. Cortex-A9 processor MBIST interface
2.1. MBISTINDATA[63:0] format for Instruction data RAM and Data data RAM
2.2. MBISTOUTDATA[255:0] format for Instruction data RAM and Data data RAM
2.3. MBISTINDATA[63:0] format for Instruction tag RAM
2.4. MBISTOUTDATA[255:0] format for Instruction tag RAM
2.5. MBISTINDATA[63:0] format for Data tag RAM
2.6. MBISTOUTDATA[255:0] format for Data tag RAM
2.7. MBISTINDATA[63:0] format for SCU tag RAM
2.8. MBISTOUTDATA[255:0] format for SCU tag RAM
2.9. MBISTINDATA[63:0] format for Outer RAM
2.10. MBISTOUTDATA[255:0] format for Outer RAM
2.11. MBISTINDATA[63:0] format for BTAC RAM
2.12. MBISTOUTDATA[255:0] format for BTAC RAM
2.13. MBISTINDATA[63:0] format for TLB RAM
2.14. MBISTOUTDATA[255:0] format for TLB RAM
2.15. MBISTINDATA[63:0] format for GHB RAM in normal mode
2.16. MBISTOUTDATA[255:0] format for GHB RAM in normal mode
2.17. MBISTINDATA[63:0] format for GHB RAM in wide mode
2.18. MBISTOUTDATA[255:0] format for GHB RAM in wide mode
2.19. MBIST controller block
2.20. Loading the MBIST controller instruction
2.21. Starting the MBIST test
2.22. Detecting an MBIST failure
2.23. Start of data log retrieval
2.24. End of data log retrieval
2.25. Start of bitmap data log retrieval
2.26. End of bitmap data log retrieval
3.1. MBIST instruction register control unit
3.2. MBIST instruction register dispatch unit
4.1. MBIST Datalog Register format for a configuration with parity
4.2. MBIST Datalog Register format for a nonparity configuration

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Revision History
Revision A02 April 2008First release for r0p0
Revision B10 July 2008Second release for r0p0
Revision C15 December 2008First release for r1p0
Revision D23 September 2009First release for r2p0
Revision E27 November 2009Second release for r2p0
Revision F29 April 2010First release for r2p2
Revision G21 July 2011First release for r3p0
Revision G26 March 2012First release for r4p0
Copyright © 2008-2012 ARM. All rights reserved.ARM DDI 0414H
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