2.1.4. APB slave interface
The APB slave interface is a fully compliant APB slave. The
DDR2 DMC has 4KB of memory allocated to it. For information about
the APB interface, see the AMBA 3 APB Protocol Specification.
The APB interface implements the register file as Chapter 3 Programmers Model describes.
Note
The APB only supports single-word 32-bit accesses. The DDR2 DMC
ignores paddr[1:0], resulting
in byte and halfword accesses being treated as word accesses.
Figure 2.5 shows
the APB interface connections.
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