PrimeCell DDR2 Dynamic Memory Controller (PL341) Technical Reference ManualRevision: r1p0
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3.3.29. User Config 0 Register

The user_config0 Register characteristics are:

Purpose

Controls the state of the user_config0 outputs.

Usage constraints

No usage constraints.

Configurations

Available in all configurations of the DDR2 DMC.

Attributes

See the register summary in Table 3.1.

Figure 3.36 shows the user_config0 Register bit assignments.

Figure 3.36. user_config0 Register bit assignments


Table 3.30 shows the user_config0 Register bit assignments.

Table 3.30. user_config0 Register bit assignments

BitsNameFunction
[31:USER_CONFIG0_WIDTH [a]]-Undefined, write as zero
[USER_CONFIG0_WIDTH–1:0]user_config0Sets the state of the user_config0[USER_CONFIG0_WIDTH–1:0] outputs

[a] If USER_CONFIG0_WIDTH is configured as 32 then none of the bits in this register are undefined.


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