| Copyright © 2007, 2009 ARM Limited. All rights reserved. | ARM DDI 0418D |
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The following information applies to the DDR2 DMC registers:
The base address is not fixed, and can be different for any particular system implementation. The offset of each register from the base address is fixed.
Do not attempt to access reserved or unused address locations. Attempting to access these location can result in Unpredictable behavior.
Unless otherwise stated in the accompanying text:
do not modify undefined register bits
ignore undefined register bits on reads
all register bits are reset to a logic 0 by a system or power-on reset.
Access type in Register summary is described as follows:
Read and write.
Read only.
Write only.
| Copyright © 2007, 2009 ARM Limited. All rights reserved. | ARM DDI 0418D |
| Non-Confidential | |
| PDF version | |
| Home > Programmers Model > About the programmers model |