3.3.35. ECC Information Register

The ecc_info0 Register characteristics are:


Returns the address location that contains either:

  • data with a non-correctable double bit-error

  • valid data, after the DDR2 DMC corrected a single bit-error.

Usage constraints

No usage constraints.


Available when a DDR2 DMC is configured to support ECC.


See the register summary in Table 3.1.

Figure 3.42 shows the ecc_info0 Register bit assignments.

Figure 3.42. ecc_info0 Register bit assignments

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Table 3.36 shows the ecc_info0 Register bit assignments.

Table 3.36. ecc_info0 Registers bit assignments




Returns the address where the DDR2 DMC either:

  • detected a double bit-error

  • corrected a single bit-error.

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