CoreLink DDR2 Dynamic Memory Controller (DMC-341) Technical Reference ManualRevision: r1p1
Home > Signal Descriptions > APB signals

A.4. APB signals

Table A.14 shows the APB signals.

Table A.14. APB interface signals

Signal AMBA equivalent [a]
paddr[31:0] [b]PADDR
penablePENABLE
prdata[31:0]PRDATA
preadyPREADY
pselPSELx
pslverr [c]PSLVERR
pwdata[31:0]PWDATA
pwritePWRITE

[a] See the AMBA 3 APB Protocol Specification for a description of these signals.

[b] The DDR2 DMC uses bits [11:2]. It ignores bits [31:12] and bits [1:0].

[c] The DDR2 DMC ties pslverr LOW.


Copyright © 2007, 2009-2010 ARM Limited. All rights reserved.ARM DDI 0418E
Non-ConfidentialID080910
PDF file icon  PDF version
Home > Signal Descriptions > APB signals