3.3.28. User Status Register

The user_status Register characteristics are:


Provides the status of the user_status inputs.

Usage constraints

No usage constraints.


Available in all configurations of the DDR2 DMC.


See the register summary in Table 3.1.

Figure 3.35 shows the user_status Register bit assignments.

Figure 3.35. user_status Register bit assignments

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Table 3.29 shows the user_status Register bit assignments.

Table 3.29. user_status Register bit assignments

[31:USER_STATUS_WIDTH[a]]-Read undefined
[USER_STATUS_WIDTH-1:0]user_statusThe state of the user_status[USER_STATUS_WIDTH-1:0] inputs

[a] If USER_STATUS_WIDTH is configured as 32 then none of the bits in this register are undefined.

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