4.1.2. Integration Inputs Register

The int_inputs Register characteristics are:


Provides the status of the following inputs:

  • csysreq

  • qos_override[15:0].

Usage constraints
  • Only accessible in Config state.

  • Integration test logic must be enabled otherwise it ignores writes and reads return 0x0. To enable the integration test logic see Integration Configuration Register.


Available in all configurations of the DDR2 DMC.


See the register summary in Table 4.1.

Figure 4.3 shows the int_inputs Register bit assignments.

Figure 4.3. int_inputs Register bit assignments

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Table 4.3 shows the int_inputs Register bit assignments.

Table 4.3. int_inputs Register bit assignments

[31:24]-Read undefined
[23:8]qos_overrideReturns the status of the qos_override[15:0] inputs
[7:1]-Read undefined
[0]csysreqReturns the status of the csysreq input

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