2.1.3. APB slave interface

The APB slave interface provides access to the internal registers of the DDR2 DMC. Figure 2.4 shows the APB interface signals.

Figure 2.4. APB interface

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


See APB slave interface for more information.

Copyright © 2007, 2009-2010 ARM Limited. All rights reserved.ARM DDI 0418E
Non-ConfidentialID080910