2.2.6. Miscellaneous signals

You can use the following general-purpose signals for controlling or monitoring logic that is external to the DDR2 DMC:

user_status[USER_STATUS_WIDTH-1:0]

You can read the status of these general-purpose inputs by using the User Status Register. You must tie any unused signals to either HIGH or LOW. These signals are connected directly to the APB interface block. Therefore, if they are driven from external logic that is not clocked by the aclk signal, then external synchronization registers are required.

user_config0[USER_CONFIG0_WIDTH-1:0]

The user_config0 Register controls these general-purpose outputs, see User Config 0 Register. If you do not require these signals, leave them unconnected.

user_config1[USER_CONFIG1_WIDTH-1:0]

The user_config1 Register controls these general-purpose outputs, see User Config 1 Register. If you do not require these signals, leave them unconnected.

You can use the following miscellaneous signals, as tie-offs, to change the operational behavior of the controller:

rst_bypass

Use this signal for Automatic Test Pattern Generation (ATPG) testing only. You must tie it LOW for normal operation.

dft_en_clk_out

Use this signal for ATPG testing only. It is only available when the controller is configured to provide a legacy pad interface. You must tie it LOW for normal operation.

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