2.1. Programmable Quality of Service (ProgQoS)

The QoS scheme works by tracking the number of outstanding transactions, and when a specified number is reached, only permits transactions from particular, specified masters.

The QoS scheme only provides support for slaves that have a combined acceptance capability, such as the PrimeCell Dynamic Memory Controller (PL340).

The QoS scheme has no effect until the AXI bus matrix calculates that, at a particular MI, there are a number of outstanding transactions equal to the value stored in the QoS tidemark register. It then accepts transactions only from slave ports specified in the QoS access control register. This restriction remains until the number of outstanding transactions is again less than the value stored in the QoS tidemark register. See QoS tidemark register and QoS access control register.

Figure 2.1 shows the implementation for an interconnect that supports two masters and one slave.

Figure 2.1. Example implementation of ProgQoS control registers for 21 interconnect

Note

When there is only one master, the QoS logic is removed as an optimization. However, the APB configuration interface enables you to program QoS parameters, but they have no effect.

For the programmer’s model, see Programmable Quality of Service (ProgQoS).

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