3.2.2. Programmer’s model

The arbitration schemes are configured, programmed, and interrogated on a per-master-interface basis, and the programmer’s model reflects this. The arbitration programming and interrogation in the APB programming interface address map, are in the per-master-interface address space, at offset 0x400. The interfaces are spaced at 0x20 intervals from this base. See Arbitration scheme.

You cannot write to the RR scheme and so although the arbiters operate separately, interrogating the AW channel’s data returns the same data as the AR channel. The LRG scheme enables the AR and AW channels to be programmed differently, thus the data for the AR channel is located at offset 0x8 within the individual interface’s space and for the AW channel at offset 0xC.

This section contains the following subsections:


Because there is insufficient space in the MI address map allocation to address each arbitration slot individually, the number of the slot being accessed is encoded in the most significant byte of the write data being written.

To write a new priority value into the LRG scheme, the write data is comprised as follows:

  • the SI number for which the priority value applies is encoded in bits [7:0] of the write data

  • the priority value is encoded in bits [15:8] of the write data

  • the slot for which the data is to be written is encoded in bits [31:24] of the write data.

It is important to ensure that a value is written only to the slot that already contains the priority value for the SI whose priority you want to modify - writes are ignored if this is not the case. This behavior is required because the arbitration system must maintain exactly one slot for each SI for correct operation.

You cannot program the RR scheme so writes are completed but are ignored.


To read from a particular slot, the slot number must be registered before the read occurs. This is done by using a specially formatted write access. This write access must have bits [31:8] of its write data set to 0xFF0000, making it a write access to slot 255, and bits [7:0] of the write data set to the read slot whose value is to be returned.

The format of the returned data depends on the arbitration scheme. The RR scheme returns the SI number that occupies that slot in the LSB of the read data. The LRG scheme returns the priority and SI number in the same positions as they occupy in write data.

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