2.3. Operating states

Figure 2.7 shows the operating states for the DMA manager thread and DMA channel threads. The DMAC provides a separate state machine for each thread.

Figure 2.7. Thread operating states


Note

In Figure 2.7, the DMAC permits that:

  • only DMA channel threads can use states in bold italics

  • arcs with no letter designator indicate state transitions for the DMA manager and DMA channel threads, otherwise use is restricted as follows:

    C

    DMA channel threads only.

    M

    DMA manager thread only.

  • states within the dotted line can transition to the Faulting completing, Faulting, or Killing states.

After the DMAC exits from reset, it sets all DMA channel threads to the Stopped state, and the status of boot_from_pc controls the DMA manager thread state:

boot_from_pc is LOW

DMA manager thread moves to the Stopped state.

boot_from_pc is HIGH

DMA manager thread moves to the Executing state.

The following sections describe the states:

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