A.2.1. AXI slave interface signals

The following sections describe the AXI slave interface signals:

Write address (AXI-AW) channel signals

Table A.2 lists the AXI write address signals for the AXI slave interface.

Table A.2. AXI-AW signals for the AXI slave interface

Signal AMBA equivalent [a]
awaddrs[AXI_ADDRESS_MSB:0] [b]AWADDR[31:0]
awbursts[1:0]AWBURST[1:0]
awcaches[3:0]AWCACHE[3:0]
awids[AID_WIDTH - 1:0] [b]AWID[3:0]
awlens[3:0]AWLEN[3:0]
awlocks[1:0]AWLOCK[1:0]
awprots[2:0]AWPROT[2:0]
awreadysAWREADY
awsizes[2:0]AWSIZE[2:0]
awusers[AWUSER_WIDTH-1:0] [b] [c]-
awvalidsAWVALID

[a] See the AMBA AXI Protocol v1.0 Specification for a description of these signals.

[b] The bus width is set when you configure the TZASC.

[c] The use of this sideband signal is user-defined.


Write data (AXI-W) channel signals

Table A.3 lists the AXI write data signals for the AXI slave interface.

Table A.3. AXI-W signals for the AXI slave interface

Signal AMBA equivalent [a]
wdatas[AXI_DATA_MSB:0] [b]WDATA[31:0]
wids[AID_WIDTH - 1:0] [b]WID[3:0]
wlastsWLAST
wreadysWREADY
wstrbs[AXI_STRB_MSB:0] [b]WSTRB[3:0]
wusers[WUSER_WIDTH-1:0] [b] [c]-
wvalidsWVALID

[a] See the AMBA AXI Protocol v1.0 Specification for a description of these signals.

[b] The bus width is set when you configure the TZASC.

[c] The use of this sideband signal is user-defined.


Write response (AXI-B) channel signals

Table A.4 lists the AXI write response signals for the AXI slave interface.

Table A.4. AXI-B signals for the AXI slave interface

Signal AMBA equivalent [a]
bids[AID_WIDTH - 1:0] [b]BID[3:0]
breadysBREADY
bresps[1:0]BRESP[1:0]
busers[BUSER_WIDTH-1:0] [b] [c]-
bvalidsBVALID

[a] See the AMBA AXI Protocol v1.0 Specification for a description of these signals.

[b] The bus width is set when you configure the TZASC.

[c] The use of this sideband signal is user-defined.


Read address (AXI-AR) channel signals

Table A.5 lists the AXI read address signals for the AXI slave interface.

Table A.5. AXI-AR signals for the AXI slave interface

Signal AMBA equivalent [a]
araddrs[AXI_ADDRESS_MSB:0] [b]ARADDR[31:0]
arbursts[1:0]ARBURST[1:0]
arcaches[3:0]ARCACHE[3:0]
arids[AID_WIDTH - 1:0] [b]ARID[3:0]
arlens[3:0]ARLEN[3:0]
arlocks[1:0]ARLOCK[1:0]
arprots[2:0]ARPROT[2:0]
arreadysARREADY
arsizes[2:0]ARSIZE[2:0]
arusers[ARUSER_WIDTH-1:0] [b] [c]-
arvalidsARVALID

[a] See the AMBA AXI Protocol v1.0 Specification for a description of these signals.

[b] The bus width is set when you configure the TZASC.

[c] The use of this sideband signal is user-defined.


Read data (AXI-R) channel signals

Table A.6 lists the AXI read data signals for the AXI slave interface.

Table A.6. AXI-R signals for the AXI slave interface

Signal AMBA equivalent [a]
rdatas[AXI_DATA_MSB:0] [b]RDATA[31:0]
rids[AID_WIDTH - 1:0] [b]RID[3:0]
rlastsRLAST
rreadysRREADY
rresps[1:0]RRESP[3:0]
rusers[RUSER_WIDTH-1:0] [b] [c]-
rvalidsRVALID

[a] See the AMBA AXI Protocol v1.0 Specification for a description of these signals.

[b] The bus width is set when you configure the TZASC.

[c] The use of this sideband signal is user-defined.


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