3.1.1. Register map

The register map of the TZASC spans a 4KB region, as Figure 3.1 shows.

Figure 3.1. Register map

In Figure 3.1, the register map consists of the following regions:

Configuration, lockdown, and interrupt

Use these registers to determine the global configuration of the TZASC, and control its operating state.

Fail status

These registers provide information about an access that failed because of insufficient permissions.


Use these registers to enable the TZASC to perform security inversion or speculative accesses.

Region control

Use these registers to control the operating state of each region.

Integration test

Use these registers when testing the integration of the TZASC in a System-on-Chip (SoC). See Chapter 4 Programmers Model for Test for more information.

Component configuration

These registers enable the identification of system components by software.

Copyright © 2008, 2010 ARM Limited. All rights reserved.ARM DDI 0431B