3.2.5. Interrupt Status Register

The int_status Register characteristics are:

Purpose

Returns the status of the interrupt.

Usage constraints

There are no usage constraints.

Configurations

Available in all configurations of the TZASC.

Attributes

See the register summary in Table 3.1.

Figure 3.6 shows the int_status Register bit assignments.

Figure 3.6. int_status Register bit assignments


Table 3.6 shows the int_status Register bit assignments.

Table 3.6. int_status Register bit assignments

BitsNameFunction
[31:2]-Reserved, SBZ
[1]overrun

When set to 1, it indicates the occurrence of two or more region permission failures since the interrupt was last cleared

[0]status

Returns the status of the interrupt:

0 = interrupt is inactive

1 = interrupt is active.


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