4.2.2. Integration Test Input Register

The itip Register characteristics are:


Enables a processor to read the status of secure_boot_lock.

Usage constraints

Integration test logic must be enabled otherwise reads return 0x0. See Integration Test Control Register for information about enabling the integration test logic.


Available in all configurations of the TZASC.


See the register summary in Table 4.1.

Figure 4.2 shows the itip Register bit assignments.

Figure 4.2. itip Register bit assignments

Table 4.3 shows the itip Register bit assignments.

Table 4.3. itip Register bit assignments


Returns the status of secure_boot_lock:

0 = secure_boot_lock is LOW

1 = secure_boot_lock is HIGH.

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