2.2.6. Denied AXI transactions

If an AXI transaction has insufficient security privileges then for:

Reads

The TZASC responds to the master by setting all bits of the read data bus, rdatas[AXI_DATA_MSB:0], to zero.

Note

If the TZASC is programmed to perform speculative accesses, it discards the data that it receives on rdatam[AXI_DATA_MSB:0].

Writes

The TZASC prevents the transfer of data from the master to the slave by discarding the data that wdatas[AXI_DATA_MSB:0] contains. If you program the TZASC to perform speculative accesses, it modifies the transfer to the slave by setting all bits of the:

  • write data bus, wdatam[AXI_DATA_MSB:0], to zero

  • write data strobe, wstrbm[AXI_STRB_MSB:0], to zero.

Note

The action Register controls whether the TZASC signals to the master when a region permission failure occurs, and if so, the type of response it provides. See Action Register.

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