A.1. Clock and reset signals

Table A.1 shows the clock and reset signals.

Table A.1. Clock and reset signals

Signal

Type

Source

Description

aclk

Input

Clock source

Clock for the TZASC.
pclken

Input

Clock generator

Clock enable signal that enables the APB slave interface to operate at either:

  • the aclk frequency

  • a divided integer multiple of aclk that is aligned to aclk.

Note

If you do not use pclken, you must tie it HIGH. This results in the APB slave interface being clocked directly by aclk.

aresetn

Input

Reset source

Reset for the TZASC. This signal is active LOW.

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