TrustZone Address Space Controller (TZC-380) Technical Reference Manual: 3.2. Register descriptions

3.2. Register descriptions

This section describes the registers that the TZASC provides. Table 3.1 lists the registers.

Table 3.1. Register summary

Offset	Name	Type	Reset	Width	Description
`0x000`	configuration	RO	- ^[a]	32	Configuration Register
`0x004`	action	RW	`0x0000 0001`	32	Action Register
`0x008`	lockdown_range	RW ^[b]	`0x0000 0000`	32	Lockdown Range Register
`0x00C`	lockdown_select	RW ^[c]	`0x0000 0000`	32	Lockdown Select Register
`0x010`	int_status	RO	`0x0000 0000`	2	Interrupt Status Register
`0x014`	int_clear	WO	`0x0000 0000`	32	Interrupt Clear Register
`0x018` - `0x01C`	-	-	-	-	Reserved
`0x020`	fail_address_low	RO	`0x0000 0000`	32	Fail Address Low Register
`0x024`	fail_address_high	RO	`0x0000 0000`	32	Fail Address High Register
`0x028`	fail_control	RO	`0x0000 0000`	32	Fail Control Register
`0x02C`	fail_id	RO	`0x0000 0000`	-^[d]	Fail ID Register
`0x030`	speculation_control	RW ^[b]	`0x0000 0000`	32	Speculation Control Register
`0x034`	security_inversion_en	RW ^[b]	`0x0000 0000`	32	Security Inversion Enable Register
`0x038` - `0x0FC`	-	-	-	-	Reserved
`0x100`	region_setup_low_0	RW ^[e]	`0x0000 0000`	32	Region Setup Low <n> Register
`0x110`	region_setup_low_1
`0x120`	region_setup_low_2 ^[f]
. . . `0x1F0`	. . . region_setup_low_15 ^[f]
`0x104`	region_setup_high_0	RW ^[e]	`0x0000 0000`	32	Region Setup High <n> Register
`0x114`	region_setup_high_1
`0x124`	region_setup_high_2 ^[f]
. . . `0x1F4`	. . . region_setup_high_15 ^[f]
`0x108`	region_attributes_0	RW	`0xc000 0000`	32	Region Attributes <n> Register
`0x118`	region_attributes_1		`0x0000 001c`
`0x128`	region_attributes_2 ^[f]
. . . `0x1F8`	. . . region_attributes_15 ^[f]
`0x1nC` ^[g]	-	-	-	-	Reserved
`0x200` - `0xDFC`	-	-	-	-	Reserved
`0xE00` `0xE04` `0xE08`	itcrg itip itop	See Chapter 4 Programmers Model for Test for information about these registers
`0xE0C` - `0xEFC`	-	-	-	-	Reserved
`0xFD0`	periph_id_4	RO	`0x00000004`	8	Peripheral Identification Registers
`0xFE0` - `0xFEC`	periph_id_[3:0]	RO	`0x000BB380` ^[h]	8	Peripheral Identification Registers
`0xFF0` - `0xFFC`	component_id_[3:0]	RO	`0xB105F00D`	8	Component Identification Registers
^[a]The reset value depends on the configuration of the TZASC. ^[b]Access type can become RO depending on secure_boot_lock and the value of the lockdown_select Register. See Lockdown Select Register. ^[c]Access type becomes RO if secure_boot_lock goes HIGH. ^[d]Dependant on configuration, range from 31-0. ^[e]Access type is RW for all regions, except region 0 is RO. ^[f]The configuration of the TZASC controls the number of regions, and therefore, the region_<…>_2 to region_<…>_15 registers that are available. ^[g]For values of `n` from `0x0` to `0xF` inclusive. ^[h]The reset value depends on the revision of the TZASC. See Peripheral Identification Register 2.

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