Cortex-A5 Technical Reference ManualRevision: r0p1
Home > Performance Monitoring Unit > Performance monitoring register descriptions > Authentication Status Register

10.2.18. Authentication Status Register

The PMAUTHSTATUS Register characteristics are:

Purpose

Reads the current values of the configuration inputs that determine the performance monitor permission level.

Usage constraints

There are no usage constraints.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 10.1.

Figure 10.15 shows the PMAUTHSTATUS Register bit assignments.

Figure 10.15. PMAUTHSTATUS Register bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 10.19 shows the PMAUTHSTATUS bit assignments.

Table 10.19. PMAUTHSTATUS Register bit assignments

BitsNameValueDescription

[31:8]

Reserved

-

RAZ
[7]Secure noninvasive debug enabled

b1

Secure noninvasive debug enable field

[6]

(DBGEN || NIDEN) && (SPIDEN || SPNIDEN)

[5:4]

Secure invasive debug RAZ

Secure invasive debug features not implemented

[3]

Non-secure noninvasive debug enabled

b1

Non-secure noninvasive debug enable field

[2]

DBGEN || NIDEN

[1:0]

Non-secure invasive debug RAZ

Non-secure invasive debug features not implemented


Copyright © 2009, 2010 ARM. All rights reserved.ARM DDI 0433B
Non-ConfidentialID101810
PDF file icon  PDF version
Home > Performance Monitoring Unit > Performance monitoring register descriptions > Authentication Status Register