Cortex-A5 Technical Reference Manual: 4.1. About system control

4.1. About system control

The system control coprocessor, CP15, controls and provides status information for the functions implemented in the processor. The main functions of the system control coprocessor are:

overall system control and configuration
MMU configuration and management
cache configuration and management
system performance monitoring.

Note

See Chapter 9 Debug for a description of the debug registers accessed through CP14.

In ARMv7-A the following registers have instruction set equivalents:

Instruction Synchronization Barrier
Data Synchronization Barrier
Data Memory Barrier
Wait for Interrupt.

This section gives an overall view of the system control coprocessor. See System control functional groups for details of the registers in the system control coprocessor.

The following sections describe system control:

System control functional groups
System control and configuration
MMU control and configuration
Cache control and configuration
Cache Operations Registers
System performance monitor registers
System feature registers
c0, Instruction set attributes registers
c7, VA to PA operations
c8, TLB maintenance operations
c10, Memory region remap
c13, Software Thread ID Registers
c15, TLB access and attributes.

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