Cortex-A5 MPCore Technical Reference ManualRevision: r0p1
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4.3.29. Secure Debug Enable Register

The SDER characteristics are:

Purpose

Controls processor debug.

Usage constraints

The SDER is:

  • only accessible in privileged modes

  • only accessible in Secure state.

Accesses in Non-secure state cause an Undefined instruction exception.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 4.10.

Figure 4.29 shows the SDER bit assignments.

Figure 4.29. SDER bit assignments

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Table 4.50 shows the SDER bit assignments.

Table 4.50. SDER bit assignments

BitsNameDescription
[31:2]ReservedRAZ.
[1]SUNIDEN

Secure User Non-Invasive Debug Enable:

0 = non-invasive debug not permitted in Secure User mode. This is the reset value.

1 = non-invasive debug permitted in Secure User mode.

[0]SUIDEN

Secure User Invasive Debug Enable:

0 = invasive debug not permitted in Secure User mode. This is the reset value.

1 = invasive debug permitted in Secure User mode.


To access the SDER, use:

MRC p15, 0, <Rd>, c1, c1, 1; Read Secure debug enable Register

MCR p15, 0, <Rd>, c1, c1, 1; Write Secure debug enable Register
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