3.5.8. Auxiliary Control Register

The ETMAUXCR characteristics are:

Purpose

Provides additional implementation-defined ETM controls.

Usage constraints

There are no usage constraints.

Configurations

Always available.

Attributes

See the register summary in Table 3.1 and Table 3.3.

Figure 3.8 shows the ETMAUXCR bit assignments.

Figure 3.8. ETMAUXCR bit assignments


Table 3.16 shows the ETMAUXCR bit assignments.

Table 3.16. ETMAUXCR bit assignments

BitsValueDescription
[31:3]-Reserved, RAZ.
[2]0

Disables tracing of data packets from VFP or Neon load or store instructions. This only suppresses the data packets. Comparators and other resources can still match on the data from these instructions.

[1]0Suppresses generation of timestamp packets because of the execution of ISB instructions.
[0]0Do not force a FIFO overflow if periodic synchronization has not been output for two full synchronization periods.

Copyright © 2009 ARM. All rights reserved.ARM DDI 0435A
Non-Confidential