3.5.5. Configuration Code Extension Register

The ETMCCER characteristics are:

Purpose

Indicates the configuration of the extended external input bus.

Usage constraints

There are no usage constraints.

Configurations

Always available.

Attributes

See the register summary in Table 3.1 and Table 3.3.

Figure 3.5 shows the ETMCCER bit assignments.

Figure 3.5. ETMCCER bit assignments


Table 3.13 shows the ETMCCER bit assignments.

Table 3.13. ETMCCER bit assignments

BitsValueDescription
[31:30]0Reserved, RAZ.
[29]-

Timestamp size. The possible values of this bit are:

0

Value is 48-bits.

1

Value is 64-bits.

[28]-

Timestamp encoding. The possible values of this bit are:

0

The value is gray encoded.

1

The value is natural binary encoded.

[27]0

Reduced function counter.

This bit is 0, indicating that all counters are implemented as full-function counters.

[26]0

The Virtualization Extensions are implemented.

This bit is 0, indicating that the Virtualization Extensions are not implemented.

[25:23]0Reserved, RAZ.
[22]1

Timestamping implemented. In the ETM-A5, this bit is always set to 1, and:

  • the Timestamp Event Register is implemented

  • bit [28] in the Main Control Register is writable.

[21]0

ETMEIBCR implemented.

This bit is 1, indicating that the register is not implemented.

[20]0

Trace Start/Stop block uses EmbeddedICE watchpoint inputs.

This bit is 0, indicating that the Trace Start/Stop block cannot use these inputs.

[19:16]0

Number of EmbeddedICE watchpoint inputs.

This field is b0000, indicating that no EmbeddedICE watchpoint inputs are supported..

[15:13]0

Number of Instrumentation resources supported.

This field is b000, indicating that no instrumentation resources are supported..

[12]0

Data address comparisons supported.

This bit is 0, indicating that data address comparisons are supported.

[11]1

All registers, except some integration test registers, are readable.

See Table 3.8 for details of the access to integration test registers [a].

[10:3]30Size of extended external input bus.
[2:0]2Number of extended external input selectors.

[a] Registers with names that start with IT are the Integration Test Registers, for example ITATBCTR1.


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