3.5.10. Peripheral Identification Registers

The ETMPIDR0-ETMPIDR7 characteristics are:


Provides the standard Peripheral ID required by all CoreSight components, see the Embedded Trace Macrocell Architecture Specification for more information

Usage constraints

Only bits [7:0] of each register are used. This means that ETMPIDR0-ETMPIDR7 define a single 64-bit Peripheral ID, as Figure 3.10 shows.


Always available.


See the register summary in Table 3.1 and Table 3.7.

Figure 3.10 shows the mapping between ETMPIDR0-ETMPIDR7 and the single 64-bit Peripheral ID value,

Figure 3.10. Mapping between ETMPIDR0-ETMPIDR7 and the Peripheral ID value

Figure 3.11 shows the Peripheral ID bit assignments in the single conceptual Peripheral ID register.

Figure 3.11. Peripheral ID fields

Table 3.18 shows the values of the fields when reading this set of registers. The Embedded Trace Macrocell Architecture Specification gives more information about many of these fields.

Table 3.18. ETMPIDR0-ETMPIDR7 bit assignments

RegisterRegister numberRegister offsetBitsValueDescription
  [7:4]0x0n, where 2n is number of 4KB blocks used.
  [3:0]0x4JEP 106 continuation code.
  [7:4]0x0RevAnd (at top level). Manufacturer revision number.

Customer Modified.

0x0 indicates from ARM.

  [7:4][a] Revision Number of Peripheral. This value is the same as the Implementation revision field of the ETMIDR, see ETM ID Register.
  [3]1Always 1. Indicates that a JEDEC assigned value is used.
  [2:0]b011JEP 106 identity code[6:4].
  [7:4]b0001JEP 106 identity code[3:0]

Part Number[11:8].

Upper Binary Coded Decimal (BCD) value of Device Number.


Part Number[7:0].

Middle and Lower BCD value of Device Number.

[a] See the Description column for details.


In Table 3.18, the Peripheral Identification Registers are listed in order of register name, from most significant (ETMPIDR7) to least significant (ETMPIDR0). This does not match the order of the register offsets. Similarly, in Table 3.19 the Component Identification Registers are listed in order of register name, from most significant (ETMCIDR3) to least significant (ETMCIDR0).

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