Designers of development tools providing support for ETM functionality. Implementation-specific behavior is described in this document. You can find complementary information in the Embedded Trace Macrocell Architecture Specification (ARM IHI 0014).

Hardware and software engineers integrating the macrocell into an ASIC that includes a Cortex-A5 processor. You can find complementary information in the CoreSight ETM-A5 Integration Manual (ARM DIT 0002).