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| Non-Confidential | ID101810 |
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The ETM-A5 is delivered as synthesizable RTL. Before it can be used in a product, it must go through the following process:
Implementation. The implementer synthesizes the RTL to produce a hard macrocell.
Integration. The integrator connects the implemented design into a SoC.
Programming. The debug software developer programs the device.
Each stage of the process:
can be performed by a different party
can include options that affect the behavior and features at the next stage:
The ETM-A5 has no implementer defined options.
The integrator configures some features of the ETM-A5 by tying inputs to specific values. These configurations affect the start-up behavior before any software configuration is made. They can also limit the options available to the software.
For example, see the MAXCORES, MAXEXTIN, MAXEXTOUT, TSMAXWIDTH, and TSNATURAL inputs, described in the CoreSight ETM-A5 Integration Manual.
The programmer configures the ETM-A5 by programming particular values into software-visible registers. This affects the behavior of the ETM-A5.
See Register summary and Register descriptions for information on the ETM-A5 registers.
This manual refers to implementation-defined features that are applicable to build configuration options. References to a feature that is included mean that the appropriate build and pin configuration options have been selected, while references to an enabled feature mean one that has also been configured by software.
| Copyright © 2009, 2010 ARM. All rights reserved. | ARM DDI 0435C |
| Non-Confidential | ID101810 |
| PDF version | |
| Home > Introduction > Product documentation, design flow, and architecture > Design flow |