The LDRT, LDRHT, LDRBT, STRT, STRHT, and STRBT instructions are used in privileged modes to emulate user mode instructions and to enforce user mode permissions. These instructions are for all memory types when enforcing permission checking against the permissions that the page table specifies. The User mode permissions from the page table are used instead of the privileged mode permissions.

These instructions are also used to modify the privileged and user information on the ARPROT and AWPROT signals on the AXI. This is required if external permission checking hardware exists in the fabric memory.

The LDRT and STRT instructions for Strongly-ordered and Device pages appear on the AXI with an AxPROT value that indicates user mode access. However, the same instructions for Normal Memory might not always result in AXI transactions with an AxPROT value that indicates user mode access. This is because any Normal Memory page permits speculative prefetching at any time. Those prefetch requests, either caused by hardware prefetching or speculative prefetching triggered by flushed memory instructions, can have a value of the AxPROT field that indicates privileged mode access. This reflects the mode of the processor during the prefetch.

For Normal Write-Through Cacheable or Non-Cacheable memory, you can still access the memory speculatively, and you can merge multiple stores together before issuing them to the AXI. Because of this, you must use the LDRT and STRT instructions to present user mode on AxPROT if the LDRT and STRT instructions are preceded and followed by DMB instructions:

The DMB instructions prevent the LDRT or STRT instruction from hitting any previously requested read data, or from merging with any other requests. The DMB instructions can be DMBSY, DMBISH, DMBISH, and DMBOSH.